ChainThink report, August 17: According to market intelligence cited in a SemiAnalysis client report, Google is collaborating with AMD on a product within its 10th-generation TPU lineup.

If advanced, this would mark AMD’s first genuine involvement in a custom AI ASIC project. The report notes that Google has nine generations of TPU development experience and has long relied on Broadcom for actual silicon design;

The key appeal of this collaboration lies primarily in AMD’s CPU IP, advanced packaging, and interconnect technologies.

The report specifically highlights that Google and its clients are driving the integration of CPU cores within TPU packages to address compute-intensive workloads such as reinforcement learning.

While traditional LLM training remains accelerator-centric, inference and agent-based models in reinforcement learning demand more general-purpose compute resources running alongside accelerators.

Google’s recent hardware configurations already reflect this trend: the TPU 8i system, designed for inference and reinforcement learning workloads, pairs one Google Axion CPU with every two TPUs;

The 7th-generation TPU servers, meanwhile, pair one Intel Xeon processor with every four TPUs. There are indications that in certain scenarios, a 1:1 ratio between CPU and accelerator may yield optimal performance.